This invention relates, in general, to molded semiconductor packages, and more particularly to a molded semiconductor package having a flagless leadframe.
Molded semiconductor packages generally comprise a semiconductor die mounted on the flag of a metal leadframe wherein the semiconductor die is electrically connected to the leads of the metal leadframe by wire bonds. The semiconductor die, the wire bonds and the leadframe, excepting the leads, are then encapsulated in plastic. There are many problems inherent with this type package. These problems include the package being relatively thick, asymmetric, and having a maximum number of material interfaces. An asymmetric package creates increased bonding stresses that act on the die while material interfaces cause a molded semiconductor package to be more susceptible to failure during vapor phase, solder dip, infra red and high stress testing.
A prominent test for molded semiconductor packages is to saturate them with moisture or water vapor, followed within a short time by immersion in either a solvent vapor or a liquid solder at or above the soldering temperature. Water absorption in some currently used plastic molded packages has been measured by a weight gain of 0.4%. Upon sudden heating, this water will vaporize and rapidly build up pressure. This results in packages that may crack, and in extreme cases, literally blow apart. This test is particularly destructive if there is condensed water in package voids that generally occur at the material interfaces. Even if the molding is perfect, voids may still be produced as a result of mechanical stresses in the package due to thermal expansion differences between the molding compound, mounting flag and silicon die.
Cracks in the molding compound have occurred at die and flag corners while separations have occurred between the die and flag, die and molding compound and the flag and molding compound. It is also common for voids to occur at the die bond areas. Cracks and separations in molded semiconductor packages are especially detrimental in that they cause damage to the wire bonds as well as to the die. It is common for large amounts of stress to act upon the semiconductor die, especially at the sides and corners as a crack propagates throughout the plastic molding compound. Commonly, a separation of the passivation layer from the remainder of the die results and causes damage to the metal circuitry of the semiconductor die. Of course, this results in failure of the semiconductor device Therefore, it would be highly desirable to have a molded semiconductor package that is thin, symmetrical so as to eliminate various bonding stresses and has a minimum number of material interfaces so as to reduce the number of voids contained therein.
Another problem commonly encountered with the use of molded semiconductor packages is that of heat dissipation. It is desirable for heat to flow out of the package through the metal leads because only a minimal amount of heat will actually flow out through the plastic encapsulation itself Heat often encounters difficulty in flowing from the die to the leads and is essentially trapped within the plastic package. This heat is liable to cause temperature cycling damage due to the thermal expansion coefficient mismatch of the various materials as well as inhibiting device performance Therefore, an improved thermal path would also be highly desirable.